Thin film transistors (TFTs) are a type of field effect transistors (hereinafter referred to as FETs).
TFTs are three-terminal elements having a gate terminal, a source terminal, and a drain terminal in the basic structure. TFTs are active elements having a function of switching the current between the source terminal and the drain terminal so that a semiconductor thin film deposited on a substrate is used as a channel layer in which electrons or holes move and a voltage is applied to the gate terminal to control the current flowing in the channel layer. TFTs are electronic devices that are most widely used these days in practical application. Typical applications of TFTs include liquid-crystal driving elements.
Currently, most widely used TFTs are metal-insulator-semiconductor-FETs (MIS-FETs) in which a polycrystalline silicon film or an amorphous silicon film is used as a channel layer material. MIS-FETs including silicon are opaque to visible light and thus fail to form transparent circuits. Therefore, when MIS-FETs are used as switching elements for driving liquid crystals in liquid crystal displays, the aperture ratio of a display pixel in the devices is small.
Due to the recent need for high-resolution liquid crystals, switching elements for driving liquid crystals now require high-speed driving. In order to achieve high-speed driving, a semiconductor thin film in which the mobility of electrons or holes, is higher than that in at least amorphous silicon needs to be used as a channel layer.
Under such circumstances, Patent Document 1 proposes a transparent semi-insulating amorphous oxide thin film which is a transparent amorphous oxide thin film deposited by vapor deposition and containing elements of In, Ga, Zn, and O. The composition of the oxide is InGaO3(ZnO)m (m is a natural number less than 6) when the oxide is crystallized. The transparent semi-insulating amorphous oxide thin film is a semi-insulating thin film having a carrier mobility (also referred to as carrier electron mobility) of more than 1 cm2 V−1 sec−1 and a carrier density (also referred to as carrier electron density) of 1016 cm−3 or less without doping with an impurity ion. Patent Document 1 also proposes a thin film transistor in which the transparent semi-insulating amorphous oxide thin film is used as a channel layer.
However, as proposed in Patent Document 1, the transparent amorphous oxide thin film (a-IGZO film) containing elements of In, Ga, Zn, and O and deposited by any method of vapor deposition selected from sputtering and pulsed laser deposition has an electron carrier mobility in the range of only about from 1 to 10 cm2 V−1 sec−1. It is pointed out that this carrier mobility is insufficient when this transparent amorphous oxide thin film is formed as a channel layer in TFTs.
In addition, Patent Document 2 proposes a semiconductor device using a polycrystalline oxide semiconductor thin film which contains In and two or more kinds of metal other than In and has an electron carrier density of less than 1×1018 cm3. It is described that the two or more kinds of metal other than In are the positive divalent metal and the positive trivalent metal in claim 6 of Patent Document 2 and the positive divalent metal is at least one element selected from Zn, Mg, Cu, Ni, Co, Ca, and Sr and the positive trivalent metal is at least one element selected from Ga, Al, B, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu in claim 7 of Patent Document 2.
However, in Patent Document 2, Examples for the combination of Ga and at least one element selected from Ni, Co, Ca, and Sr are not described. In addition, the hole mobility is as low as less than 10 cm2 V−1 sec−1 in Examples for combinations other than the combination of these. Furthermore, it is not instigated which sintered body structure is preferable for an oxide sintered body to be used in sputter deposition of an oxide semiconductor thin film so as to avoid the occurrence of arcing and nodules. In addition, the sputter deposition is performed by high frequency (RF) sputtering, and it is also not clear whether the sputtering target can be subjected to direct current (DC) sputtering or not.
Patent Document 1: Japanese Unexamined Patent Application, Publication No. 2010-219538
Patent Document 2: PCT International Publication No. WO2008/117739
Patent Document 3: PCT International Publication No. WO2003/014409
Patent Document 4: Japanese Unexamined Patent Application, Publication No. 2012-253372
Non Patent Document 1: A. Takagi, K. Nomura, H. Ohta, H. Yanagi, T. Kamiya, M. Hirano, and H. Hosono, Thin Solid Films 486, 38 (2005)